VSC7959
Data Sheet
Table 7. Coordinates for Bare Die (-W)
Coordinates (µm)
Pad Name
Pad Number
X
Y
Description
CZ1
1
270.525
1359.05
Offset Correction Loop Capacitor. Place capacitor between this pin
and CZ2 to alter time constant of offset correction loop.
CZ2
2
80.95
1170.525 Offset Correction Loop Capacitor. Place capacitor between this pin
and CZ1 to alter time constant of offset correction loop.
GND
IN+
3
4
5
6
7
80.95
80.95
80.95
80.95
80.95
990.525
810.525
630.525
450.525
270.525
Supply Ground
Noninverted Data Input
Inverted Data Input
Supply Ground
IN-
GND
LEVEL
Output Current Level. This pin may be either connected to ground or
left unconnected. Connecting to ground causes output current to be
20mA. The output is 16mA when left unconnected.
TH
8
270.525
80.95
Loss of Signal (LOS) Threshold. Connect a resistor from this pin to
ground to set the input signal level at which LOS outputs will be
asserted.
LOS
LOS
9
1169.475
1359.05
80.95
Inverted Loss of Signal Output. LOS is HIGH for input signals above
the threshold programmed by TH.
10
270.525
Noninverted Loss of Signal Output. LOS is LOW for input signals
above the threshold programmed by TH.
VCC
OUT-
11
12
13
14
15
1359.05
1359.05
1359.05
1359.05
1359.05
450.525
630.525
810.525
990.525
Power Supply
Inverted Data Output
Noninverted Data Output
Power Supply
OUT+
VCC
SQUELCH
1170.525 Squelch Input. Squelch is disabled if this pin is unconnected or set
LOW. When SQUELCH is HIGH, OUT+ and OUT- are forced to static
levels.
NC
16
1169.475
1359.05
No Connection
9 of 14
G52358, Rev 4.0
2/10/03
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
