VITESSE
SEMICONDUCTOR CORPORATION
SMPTE-292M Serializer, Deserializer, and
Deserializer/Reclocker at 1.485Gb/s
Table 1: Frame Aligner Output Timing
D10-19
ACTIVE
VIDEO
DATA
---
DATA
3FF
EAV
000
000
XYZ
LINE
LN0
LN1
CRC0
CRC1
DATA
---
DATA
3FF
SAV
000
000
XYZ
ACTIVE
VIDEO
DATA
DATA
---
Advance Product Information
VSC6511
D0-9
DATA
---
DATA
3FF
000
000
XYZ
LN0
LN1
CRC0
CRC1
DATA
---
DATA
3FF
000
000
XYZ
DATA
DATA
---
LINE
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
FRAME
0
0
0
0
0
0
0
0
1*
0
0
0
0
0
0
0
0
0
0
0
0
HANC
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
CRCERR
0
0
0
0
0
0
0
0
0
0
0 or 1
0
0
0
0
0
0
0
0
0
0
Draft Copy
HORIZ
BLANK
CRC
* FRAME is HIGH only if LN0/LN1 indicates the first line of a frame.
** CRCERR is HIGH only during CRC1 if the CRC is incorrect.
D[19:0] Databus
As mentioned previously, in Serializer mode D[19:0] is configured as a input. In Deserializer mode,
D[19:0] is configured as an output.
Application Information
The VSC6511 cable driver output is intended to fully comply with the SMPTE-292M cable driver specifi-
cations. This includes an 800mV swing and a return loss of more than 15dB. The circuit shown below shows
how to connect the output of the VSC6511 to the 75 ohm cable and downstream device. The output of the
VSC6511 is actually 1200mV. The output termination circuit shown below attenuates the output signal to
800mV and ensures a return loss better than -15dB. The ISET resistor is 1.78K
Page 4
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52311-0, Rev 2.0
4/10/00