VSC6134
Datasheet
7.1.5
Section DCC Monitor and Generator Using the Microprocessor Interface
Description: The Section DCC Monitor does not store all the bytes correctly, resulting in storing the
D3 byte twice and D1 byte not being stored. As a result, stored Section DCC messages are corrupted.
It has also occured that the Section DCC Generator has not correctly transmitted the Section DCC
message.
Workaround: Use the Overhead Extraction and Insertion ports.
7.1.6
7.1.7
Z0 Generator Using the Microprocessor Interface
Description: The SONET Z0 bytes can be inserted from a microprocessor via a replay memory.
Instances have been observed where the outgoing SONET frame contains unexpected values within the
Z0 bytes (typically two consecutive bytes are corrupted). Z0 bytes should be set to count data to ensure
a DC balance.
Workaround: None.
Bit Error Rate Monitor Using the Leaky Bucket Algorithm
Description: Alarm (SD or SF) remains asserted beyond the de-assertion time if the decrement value is
greater than the error count value. Within the leaky bucket algorithm, after each monitor block, the total
error count is decremented by a programmable value. In the case where the error count value is less than
the decrement value, the error count value is not set to zero but retains its previous value.
This algorithmic issue constrains the decrement value to be less than the clearing threshold value.
Therefore, when the decrement value is greater than the error count value, the SD or SF alarm remains
asserted beyond the de-assertion time because the error counter is never decremented lower than the
clearing threshold value. Given the constraints on the decrement value, the BERM cannot meet the
SONET-specified clearing threshold times. However, the BERM does meet the detection criteria, which
is the most critical factor.
Workaround: Use the rate detection algorithm.
7.2
Digital Wrapper Overhead Processor
7.2.1
Generic-AIS (Framed PN11)
Description: The Generic-AIS monitor and generator successfully interoperate (that is, a link with
VSC6134s on both sides has no issue), but they do not function correctly with any standards-compliant
device due to an incorrect PRBS pattern. This only affects Generic-AIS, OTU-AIS (unframed PN11);
ODU-AIS are not affected.
Workaround: Use OTU-AIS or ODU-AIS in a network that is heterogeneous with respect to FEC
processors.
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
