VSC6134
Datasheet
7
Design Considerations
This section provides information about the errata for the VSC6134 device.
7.1
SONET Monitor and Generator
7.1.1
J0 Monitor 16-Byte Mode
Description: The J0 monitor does not always update the accepted message when only a single byte of
the message changes. The J0 monitor shows that CRC byte appears twice as the first and second byte,
and the whole J0 message is shifted by one byte location to the right (that is, starts in the third byte).
When two or more bytes of the J0 message change, the J0 monitor shows the correct message.
Workaround: Prior to reading the J0 message, set J0_LENGTH = 1 (64-byte mode), toggle
J0_PATTERN bits to another values (for example, if current setting is 10, change it to 01 or 00), and
then return them to the correct settings.
7.1.2
K2[2:0] Generator Using the MPU Interface and Overhead Insertion Port
Description: The K2[2:0] bytes can only be transmitted transparently, which impacts manual forcing of
RDI-L and AIS-L. This does not affect the automatic RDI-L insertion, which is controlled by
TX_K2MD_AUTO bit. When K1 and K2 bytes are inserted from a microprocessor using the
TX_K1K2BYTE register (0x7ED/0xFED), the TX_K2MD_INSRT bit (0x7EC/0xFEC), which controls
the insertion of TX_K1K2BYTE[2:0] into the outgoing SONET frame, does not work. When the
overhead insertion port is used, the K2[2:0] bytes do not overwrite incoming values.
Workaround: RDI-L can be inserted automatically.
7.1.3
7.1.4
E2 Generator Using the Microprocessor Interface
Description: The SONET E2 byte can be inserted from a microprocessor using TX_E2BYTE register
(0x7F2/0xFF2) within the VSC6134. Instances have been observed where the outgoing SONET frame
contains an incorrect E2 value when dynamic messaging using this byte is enabled (that is, under frame
to frame dynamic modification). However, static bytes (that is, the same E2 byte in each frame) are
transmitted correctly.
Workaround: Use the overhead insertion port.
Line DCC Generator Using the Microprocessor Interface
Description: Data transmission from the internal memories is non-contiguous; therefore, the outgoing
Line DCC bytes are corrupted.
Workaround: Use the overhead insertion port.
433 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
