VSC6134
Datasheet
3.9.9
Miscellaneous Configuration Register
Address:
0x988: Add Path
0x188: Drop Path
0xF900
Register Reset Value:
Table 304. Miscellaneous Configuration Register
Reset
Value
Bit
Name
Access
Description
15
ENABLE_RX
R/W
Block enable.
1: Receive MAC is enabled.
0: Receive MAC is disabled.
1
1
1
14
13
BUS_SWAP_EN
PROMIS_EN
R/W
R/W
1: Reverses the 64-bit PCS input data bus so that bit 0
goes to bit 63 and bit 63 goes to bit 0.
0: No bus reversal.
1: All frames are accepted without address recognition.
Promiscuous mode
0: Frame destination address must match MAC address.
12
11
XGE_SAT_ROLLOVERN
XGE_CLR_RD_WRN
R/W
R/W
1: MIB/RMON counters saturate when they reach their limit.
0: MIB/RMON counters rollover when they reach their limit.
1
1
1: All MIB/RMON status bits are cleared automatically
when read.
0: All MIB/RMON status bits must be written with a 1 to be
cleared.
10
9
Reserved
0
0
PCS_TEST_MODE
R/W
R/W
1: PCS block operates in test mode.
0: PCS block operates in normal mode.
8
PCS_SEL_PAT
Reserved
Selects which pattern the PCS checker should verify.
0: The fault sequence or its inverse is expected.
1: All zero or its inverse is expected.
1
7:0
RO
0x00
3.9.10
MAC Address Register (HIGH)
Address:
0x989: Add Path
0x189: Drop Path
0x0000
Register Reset Value:
Table 305. MAC Address Register (HIGH)
Reset
Value
Bit
Name
Access
Description
15:0
MAC_ADDR47_32
R/W
The most significant word of the 6 byte MAC address. This
word is received last. Bit 15 is bit 47 of the MAC address.
0x0000
328 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
