VSC6134
Datasheet
Table 77. Drop FEC Encoder Registers (continued)
Address
0x2D4
0x2D5
0x2D6
0x2D7
Register Name
Reference
Drop TCM4 TTI Generator FIFO Access Register
Drop TCM3 TTI Generator FIFO Access Register
Drop TCM2 TTI Generator FIFO Access Register
Drop TCM1 TTI Generator FIFO Access Register
See Section 3.6.34, page 272.
See Section 3.6.35, page 273.
See Section 3.6.36, page 273.
See Section 3.6.37, page 274.
Table 78. Drop PRBS Checker and Generator Registers
Address
0x300
0x301
0x302
0x303
0x304
Register Name
Reference
PRBS Checker Configuration
PRBS Checker Interrupt Mask
PRBS Checker Status
See Section 3.12.7, page 362.
See Section 3.12.8, page 362.
See Section 3.12.9, page 363.
See Section 3.12.10, page 363.
See Section 3.12.2, page 360.
PRBS Checker Error Count
PRBS Generator Configuration
Table 79. Drop FEC ASYNC Map Registers
Address
0x32F
0x330
0x331
0x332
0x333
0x336
Register Name
Reference
RLL Control Register
See Section 3.7.6, page 277.
See Section 3.7.7, page 278.
See Section 3.7.8, page 278.
See Section 3.7.9, page 279.
See Section 3.7.10, page 279.
See Section 3.7.11, page 279.
RLL Lock Condition Mask Register
RLL Lock Condition Status Register
RLL Justification Interval Register
RLL Justification Reversal Direction Register
VCO Mode Control Register
Table 80. Drop SONET Section Overhead Monitor Registers
Address
Register Name
Reference
0x400-
0x45F
SOHM Z0 Register
See Section 3.3.1, page 233.
0x460
0x461
SOHM BER Monitor Configuration
See Section 3.3.2, page 233.
See Section 3.3.3, page 234.
SOHM BER Monitor Signal Degrade Monitored Frames
Register (MSW)
0x462
SOHM BER Signal Degrade Monitored Frames (LSW)
See Section 3.3.4, page 234.
208 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
