VSC6134
Datasheet
Table 96
Table 97
Table 98
Table 99
Add Line Overhead Monitor Registers.................................................................................225
LOHM Line DCC Message Registers ..................................................................................226
LOHM Configuration Register..............................................................................................226
LOHM Interrupt Mask Register ............................................................................................227
Table 100 LOHM Interrupt Status Register...........................................................................................229
Table 101 LOHM Bit Error Counter (MSW) Register ............................................................................230
Table 102 LOHM Bit Error Counter (LSW) Register .............................................................................230
Table 103 LOHM BIP-8 Block Error Counter (MSW) Register..............................................................230
Table 104 LOHM BIP-8 Block Error Counter (LSW) Register...............................................................231
Table 105 LOHM K1 and K2 Byte Validated Register ..........................................................................231
Table 106 LOHM S1 Byte Validated Register.......................................................................................231
Table 107 LOHM M1 Byte Counter (MSW) Register ............................................................................232
Table 108 LOHM M1 Byte Counter (LSW) Register .............................................................................232
Table 109 LOHM E2 Byte Orderwire Register......................................................................................232
Table 110 SOH Monitor Z0 Byte Registers...........................................................................................233
Table 111 BER Monitor Configuration Register....................................................................................233
Table 112 BER Monitor Signal Degrade Monitored Frames (MSW) Register ......................................234
Table 113 BER Monitor Signal Degrade Monitored Frames (LSW) Register .......................................234
Table 114 BER Monitor Signal Degrade Error Threshold (MSW) Register ..........................................234
Table 115 BER Monitor Signal Degrade Error Threshold (LSW) Register ...........................................235
Table 116 BER Monitor Signal Degrade Clear Threshold (MSW) Register..........................................235
Table 117 BER Monitor Signal Degrade Clear Threshold (LSW) Register...........................................235
Table 118 BER Monitor Signal Degrade Error Decrement Register.....................................................236
Table 119 BER Monitor Signal Fail Monitored Frames (MSW) Register ..............................................236
Table 120 BER Monitor Signal Fail Monitored Frames (LSW) Register ...............................................236
Table 121 BER Monitor Signal Fail Error Threshold Register (MSW) Register....................................237
Table 122 BER Monitor Signal Fail Error Threshold (LSW) Register ...................................................237
Table 123 BER Monitor Signal Fail Clear Threshold (MSW) Register..................................................237
Table 124 BER Monitor Signal Fail Clear Threshold (LSW) Register...................................................238
Table 125 BER Monitor Signal Fail Error Decrement Register.............................................................238
Table 126 J0 Monitor Valid Message Registers....................................................................................238
Table 127 J0 Monitor Control Register .................................................................................................239
Table 128 TIM Control Register............................................................................................................240
Table 129 SOH Monitor DCC Message Registers................................................................................240
Table 130 SOH Monitor Interrupt Mask Register..................................................................................241
Table 131 SOH Monitor Interrupt Status Register ................................................................................242
Table 132 B1 Block Error One Second Count Register........................................................................243
Table 133 B1 Bit Error One Second Count Register.............................................................................243
Table 134 E1 Byte Register ..................................................................................................................243
Table 135 F1 Byte Register ..................................................................................................................244
Table 136 TX LOH Generator General Configuration Register ............................................................245
Table 137 LOH Generator F1 and K2 Bytes Configuration Register ....................................................246
Table 138 TX LOH Generator S1 Byte Configuration Register.............................................................247
Table 139 LOH Generator B2 Error Configuration Register .................................................................247
Table 140 LOH Generator M0 and M1 Error Configuration Register....................................................247
Table 141 LOH Generator Source Configuration Register ...................................................................248
Table 142 TX LOH Generator E2 Byte Configuration Register.............................................................249
Table 143 TX LOH Generator Line DCC Bytes Configuration Registers..............................................249
Table 144 TX LOH Generator E2 and Line DCC Interrupt Mask Register............................................249
Table 145 TX LOH Generator E2 and Line DCC Interrupt Status Register..........................................250
Table 146 SOH Generator Z0 Byte Registers.......................................................................................251
19 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
