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VSC6134ST-01 参数 Datasheet PDF下载

VSC6134ST-01图片预览
型号: VSC6134ST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC6134  
Datasheet  
2.15.7  
StFEC(S) <-SONET(Regen) <-Async-> LFEC(S)  
The following figure shows the FEC Bridge or Regenerator mode with on-chip SONET regeneration  
and asynchronous remapping. In the add direction, the StFEC signal is framed, decoded, and optionally  
corrected; DWOH performance monitoring is performed; and the DWOH is terminated (DWOH cannot  
be passed through). The synchronously mapped SONET signal is monitored, regenerated, and  
asynchronously remapped. New DWOH is then inserted, and the LFEC parity bytes are recalculated and  
added.  
In the drop direction, the LFEC signal is framed, decoded, and optionally corrected; the payload is  
asynchronously demapped; DWOH performance monitoring is performed; and the DWOH is  
terminated (DWOH cannot be passed through). The asynchronously mapped SONET payload is  
demapped, monitored, and regenerated; the payload is synchronously mapped; new DWOH is then  
inserted; and the StFEC parity bytes are optionally recalculated and added. This mode supports the  
optional extraction of the OTU stuff bytes received in the add and drop directions and the insertion of  
the OTU stuff bytes transmitted in the add and drop directions.  
Figure 41. StFEC to LFEC Bridge with SONET Regeneration and Asynchronous Remapping Mode  
158 of 438  
VMDS-10185 Revision 4.0  
July 2006  
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