VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
High-Speed Octal
Programmable Timing Generator
VSC6048
Pin #
Signal Name Signal Type
Levels
Description
76
77
TSET74
TSET75
TSET76
VTT
TTL
TTL
TTL
—
I
Timeset Data for Channel 7, Bit 4
Timeset Data for Channel 7, Bit 5
Timeset Data for Channel 7, Bit 6
Power Supply
I
78
I
79
-2.0V
80
VCC
—
0V
Ground
81
TSET77
TSET78
TSET79
VCC
TTL
TTL
TTL
—
I
I
Timeset data for Channel 7, Bit 7
Timeset data for Channel 7, Bit 8
Timeset data for Channel 7, Bit 9
Ground
82
83
I
84
0V
I
85
DIN
TTL
TTL
TTL
—
Serial Calibration Data for Vernier Delay Setting
Resets PLL Feedback Counter
Write Pulse for DAC Register
86
PLLRST
DAC_WR
VCC
I
87
I
88
0V
I
Ground
89
SHIFT
DCLK
OUT7
OUT7N
VTT
TTL
TTL
ECL
ECL
—
Enables Shift of Data in the Calibration Register
Clock for Serial Data Shift for Calibration Register
Delayed Signal Output Channel 7
Delayed Signal Output Channel 7, Complementary
Power Supply
90
I
91
O
92
O
93
-2.0V
O
94
OUT6
OUT6N
VCC
ECL
ECL
—
Delayed Signal Output Channel 6
Delayed Signal Output Channel 6, Complementary
Ground
95
O
96
0V
O
97
OUT5
OUT5N
VTT
ECL
ECL
—
Delayed Signal Output Channel 5
Delayed Signal Output Channel 5 Complementary
Power Supply
98
O
99
-2.0V
O
100
101
102
103
104
105
106
107
108
OUT4
OUT4N
NC
ECL
ECL
—
Delayed Signal Output Channel 4
Delayed Signal Output Channel 4, Complementary
Not Connected
O
—
O
OUT3
OUT3N
VCC
ECL
ECL
—
Delayed Signal Output Channel 3
Delayed Signal Output Channel 3, Complementary
Ground, 0V
O
0V
O
OUT2
OUT2N
VTT
ECL
ECL
—
Delayed Signal Output Channel 2
Delayed Signal Output Channel 2, Complementary
Power Supply
O
-2.0V
Page 12
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52335-0,Rev.4.0
8/28/00
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
