DATA INTERCONNECT
VSC3312
6.5 Gbps 12x12 Crosspoint Switch
BLOCK DIAGRAM:
SWITCH
12
12
12
12
Input[0:11]
EQ
EQ
Output[0:11]
VSC3312
REGISTERS
Two-Wire/Four-Wire Serial
ResetB
Stat[1:0]
Mode[3:0]
hipAddr[9:0]
Config
SCK
SDA
SMI
SMO
F E AT U R E S :
6.5 Gbps non-return-to-zero (NRZ) data bandwidth
Fully non-blocking and multicasting switch core with per-pin signal
inversion capability
Multiple time-constant programmable input and output equalization
Wide equalization adjustment range
Fully asynchronous operation with <1 ns latency
Reconfigurable Input/Output (I/O) capability
LOS detection and forwarding
BENEFITS:
Transparent support for virtually all data rates and protocols
Allows complete flexibility in routing and distributing signals
Compensates for multiple impairments in a signal path
Supports all types of interconnect media: PCB, backplanes, and cable
No adjustments based on data rate or reference clock required
Customize the I/O to the application
OOB forwarding for protocols like SAS and SATA
A P P L I C AT I O N S :
Wideband signal switching and clean-up
Line driver or receiver
Backplane signal fanout, driver, or receiver
Copper cable driver or receiver
PCB signal enhancement
VPPD-01370
Revision 1.0
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
