VSC3303
P
RODUCT
B
RIEF
8.5 Gbps 4 × 4 Crosspoint Switch
BLOCK DIAGRAM:
Switch Core
Inputs [3:0]
EQ
EQ
Outputs [3:0]
VSC3303
Programming Interface
Features
8.5 Gbps non-return-to-zero (NRZ) data bandwidth
Fully non-blocking and multicasting switch core with per-pin
signal inversion capability
Multiple time-constant programmable input and output
equalization
Wide equalization adjustment range
Fully asynchronous operation with <1 ns latency
LOS detection and forwarding
Small 7 mm × 7 mm BGA package with 1.0 mm pin pitch
Benefits
Transparent support for virtually all data rates and protocols
Allows complete flexibility in routing and distributing signals
Compensates for multiple impairments in a signal path
Supports all types of interconnect media such as PCB,
backplanes, and cable
No adjustments based on data rate or reference clock required
OOB forwardng for protocols such as SAS and SATA
Convenient size and pin spacing for signal routing flexibility
Applications
• Wideband signal switching and clean-up
• Line driver or receiver
• Backplane signal fanout, driver, or receiver
• Copper cable
• PCB signal enhancement
• High-speed signal conditioner
www.vitesse.com
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
