DATA INTERCONNECT
VSC3144
6.5 Gbps 144 × 144 Asynchronous Crosspoint Switch
BLOCK DIAGRAM:
Switch Core
Inputs [143:0]
EQ
EQ
Outputs [143:0]
VSC3144
Programming Interface
F E AT U R E S :
6.5 Gbps 144 × 144 strictly nonblocking switch matrix with multicast and
output striping programming modes
Input signal equalization (ISE) with programmable control globally or on
a per-channel basis
Adjustable output pre-emphasis EQ
Differential current mode logic (CML) data output driver
Protocol-independent switching and data transmission
16 W typical power dissipation
45 mm × 45 mm, 1.27 mm pin pitch, 1072-pin BGA package
Parallel and serial programming modes for configuration and monitoring
Software control to optimize power dissipation
BENEFITS:
936 Gbps aggregate bandwidth in a single chip for high-density network
switching and video systems
Addresses system-level and board-level signal integrity (SI) and
intersymbol interface (ISI) jitter issues
EQ and drive flexibility for driving boards, cables, and circuit traces
Convenient I/O flexibility for interfacing with multiple standards
Can be used with latest storage, Ethernet, and networking standards
Low per-channel power
Layout-friendly package and pinout for easier PCB design
Programming and control convenience
Control and lower overall power when ports are not in use
A P P L I C AT I O N S :
Core and metro transport
Enterprise
High-speed automated test equipment
Broadcast video systems
Storage, Ethernet, and networking equipment
VPPD-01551
Revision 1.0
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
