DG444, DG445
Vishay Siliconix
SCHEMATIC DIAGRAM
Typical Channel
V+
S
V
L
V-
V
IN
Level
Shift/
Drive
V+
GND
D
V-
Figure 1.
TEST CIRCUITS
+5V
+ 15 V
Logic
Input
3V
50 %
0V
V
O
R
L
1 k
V-
Switch
Output
0V
t
ON
Logic input waveform is inverted for DG445.
C
L
35 pF
Switch
Input
V
S
V
O
80 %
80 %
t
OFF
50 %
t
r
< 20 ns
t
f
< 20 ns
V
L
± 10 V
S
IN
3V
GND
V+
D
- 15 V
C
L
(includes fixture and stray capacitance)
Note:
Figure 2. Switching Time
+5V
+ 15 V
V
O
V
O
R
g
V
L
S
IN
V+
D
C
L
1 nF
V-
V
O
IN
X
OFF
(DG444)
ON
OFF
V
g
3V
GND
- 15 V
IN
X
(DG445)
OFF
ON
Q =
V
O
x C
L
OFF
Figure 3. Charge Injection
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Document Number: 70054
S11-0984-Rev. G, 23-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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