DG417L, DG418L, DG419L
Vishay Siliconix
SCHEMATIC DIAGRAM
(Typical Channel)
V+
S
V
L
V-
V
IN
Level
Shift/
Drive
V+
GND
D
V-
Figure 1.
TEST CIRCUITS
V
L
V+
t
r
< 5 ns
t
f
< 5 ns
t
OFF
V
OUT
Logic
Input
Switch
Output
V
OUT
R
L
300
Ω
C
L
35 pF
V
INH
V
INL
50 %
Switch
Input
V
IN
V
L
NO or NC
IN
GND
V+
COM
90 %
0.9 x V
OUT
V-
Switch
Output
0V
t
ON
V-
C
L
(includes fixture and stray capacitance)
V
OUT
= V
IN
R
L
R
L
+ R
ON
Note:
Logic input waveform is inverted for switches that
have the opposite logic sense control
Figure 2. Switching Time
V
L
V+
Logic
Input
V
O
R
L
300
Ω
C
L
35 pF
V
INH
V
INL
t
r
< 5 ns
t
f
< 5 ns
V
L
V
NO
V
NC
NO
NC
IN
GND
V+
COM
V
NC
= V
NO
V
O
Switch
Output
0V
90 %
V-
t
D
t
D
V-
C
L
(includes fixture and stray capacitance)
Figure 3. Break-Before-Make (DG419L)
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8
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VISHAY [ VISHAY TELEFUNKEN ]
