DG201A_MIL/202_MIL
Vishay Siliconix
TEST CIRCUITS
V
O
is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+15 V
3 V
0 V
V+
Logic
Input
t <20 ns
t <20 ns
f
50%
r
S
D
V
S
= +2 V
3 V
V
O
t
IN
OFF
C
35 pF
R
1 kW
L
L
V–
GND
90%
Switch
Output
V
O
t
–15 V
= V
ON
R
L
V
O
S
R
L
+ r
DS(on)
FIGURE 2. Switching Time
+15 V
V+
C
+15 V
V+
C
S
D
D
V
S
1
1
R
g
= 50 W
V
R
O
S
D
50 W
V
S
IN
1
0V, 2.4 V
NC
R
g
= 50 W
L
V
O
S
2
2
IN
0V, 2.4 V
R
L
GND
V–
C
IN
2
0V, 2.4 V
GND
V–
C
–15 V
C = RF bypass
Isolation = 20 log
V
V
V
S
S
–15 V
Off Isolation = 20 log
X
TALK
V
O
O
FIGURE 3. Off Isolation
FIGURE 4. Channel-to-Channel Crosstalk
+15 V
V+
DV
O
V
O
R
g
S
D
V
O
IN
V
g
C
ON
OFF
ON
IN
X
L
3 V
1000 pF
V–
GND
DV = measured voltage error due to charge injection
O
The charge injection in coulombs is Q = C x DV
L
O
–15 V
FIGURE 5. Charge Injection
Document Number: 70036
S-00405—Rev. G, 21-Feb-00
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