DCM4623xD2K53E0yzz
Figure 21 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
C
OUT-EXT-x: electrolytic or tantalum capacitor, 220 µF ≤ C3 ≤2200 µF;
C4, C5: additional ceramic /electrolytic capacitors, if needed for
output ripple filtering;
In order to help sensitive signal circuits reject potential noise,
additional components are recommended:
R2_x: 301 Ohm, facilitate noise attenuation for TR pin;
FB1_x, C2_x: FB1 is a ferrite bead with an impedance of at least 10 Ω
at 100MHz. C2_x can be a ceramic capacitor of 0.1uF. Facilitate noise
attenuation for EN pin.
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1 + PD3
Note: Use an RCR filter network as suggested in the application note
AN:030 to reduce the noise on the signal pins.
Thermal Resistance Top
INT-TOP°C / W
MAX INTERNAL TEMP
θ
Note: In case of the excessive line inductance, a properly sized
decoupling capacitor CDECOUPLE is required as shown in Figure 23
and Figure 24.
Thermal Resistance Bottom
INT-BOTTOM°C / W
Thermal Resistance Leads
θ
θINT-LEADS°C / W
+
–
T
CASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
Power Dissipation (W)
VTR VEN
DCM1
R2_1
TR
EN
FB1_1
C2_1
FT
R1_1
L2_1
F1_1
+IN
-IN
+OUT
-OUT
+IN
-IN
+OUT
-OUT
L1_1
C1_1
CDECOUPLE
COUT-EXT-1
C4
C5
Figure 22 — One side cooling thermal model
DCM2
R2_2
TR
EN
FT
FB1_2
C2_2
R1_2
L1_2
L2_2
F1_2
Figure 22 shows a scenario where there is no bottom side and leads
cooling. In this case, the heat flow path to the bottom is left open and
the equations now simplify to:
+IN
-IN
+OUT
-OUT
C1_2
COUT-EXT-2
≈≈
≈ ≈
≈
≈ ≈
DCM8
R2_8
TR
EN
FT
FB1_8
TINT – PD1 • θINT-TOP = TCASE_TOP
C2_8
R1_8
R3
L2_8
F1_8
PDTOTAL = PD1
+IN
-IN
+OUT
-OUT
L1_8
R4
D1
C1_8
COUT-EXT-8
Shared -IN Kelvin
Vicor provides a suite of online tools, including a simulator and
thermal estimator which greatly simplify the task of determining
whether or not a DCM thermal configuration is sufficient for a given
condition. These tools can be found at:
Figure 23 — DCM paralleling configuration circuit 1
www.vicorpower.com/powerbench.
When common mode noise rejection in the input side is needed,
common mode chokes can be added in the input side of each DCM.
An example of DCM paralleling circuit is shown below:
Array Operation
A decoupling network is needed to facilitate paralleling:
n An output inductor should be added to each DCM, before the
outputs are bussed together to provide decoupling.
DCM1
R2_1
TR
+
VTR1
EN
FT
+
_
n Each DCM needs a separate input filter, even if the multiple DCMs
share the same input voltage source. These filters limit the ripple
current reflected from each DCM, and also help suppress
generation of beat frequency currents that can result when
multiple powertrains input stages are permitted to
direclty interact.
FB1_1
C2_1
VEN1
_
R1_1
L1_1
R3_1
SGND1
L2_1
F1_1
+IN
-IN
+OUT
-OUT
+IN
-IN
+OUT
-OUT
R4_1
D1_1
CDECOUPLE
C1_1
COUT-EXT-1
C4
C5
SGND1
R2_2
DCM2
TR
EN
FT
+
VTR2
_
+
FB1_2
C2_2
VEN2
_
R1_2
L1_2
R3_2
SGND2
L2_2
F1_2
+IN
-IN
+OUT
-OUT
R4_2
D1_2
C1_2
COUT-EXT-2
If signal pins (TR, EN, FT) are not used, they can be left floating, and
DCM will work in the nominal output condition.
SGND2
≈≈
≈ ≈
DCM8
When common mode noise in the input side is not a concern, TR and
EN can be driven and FT received using a single Kelvin connection to
the shared -IN as a reference.
R2_8
TR
EN
FT
+
VTR8
_
+
FB1_8
C2_8
VEN8
_
R1_8
L1_8
R3_8
SGND8
L2_8
F1_8
+IN
-IN
+OUT
-OUT
R4_8
D1_8
C1_8
COUT-EXT-8
Note: For more information on parallel operation of DCMs, refer to
“Parallel DCMs” application note AN:030.
SGND8
Figure 24 — DCM paralleling configuration circuit 2
An example of DCM paralleling circuit is shown in Figure 23.
Notice that each group of control pins need to be individually driven
and isolated from the other groups control pins. This is because -IN
of each DCM can be at a different voltage due to the common mode
chokes. Attempting to share control pin circuitry could lead to
incorrect behavior of the DCMs.
Recommended values to start with:
L1_x: 1 µH, minimized DCR;
R1_x: 1.0 Ω;
C1_x: Ceramic capacitors in parallel, C1 = 2 µF;
L2_x: L2 ≥ 0.15 µH;
DCM™ DC-DC Converter
Rev 1.4
Page 21 of 25
04/2018