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BCM3814B60E10A5C02 参数 Datasheet PDF下载

BCM3814B60E10A5C02图片预览
型号: BCM3814B60E10A5C02
PDF下载: 下载PDF文件 查看货源
内容描述: [Isolated Fixed-Ratio DC-DC Converter]
分类和应用:
文件页数/大小: 39 页 / 1258 K
品牌: VICOR [ VICOR CORPORATION ]
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BCM3814x60E10A5yzz  
Signal Characteristics  
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C TCASE  
100°C (T-Grade); all other specifications are at TCASE = 25ºC unless otherwise noted. Please note: For chassis mount model, Vicor part number 42550 will be  
needed for applications requiring the use of the signal pins. Signal cable 42550 is rated up to five insertions and extractions. To avoid unnecessary stress on the  
connector, the cable should be tied to the chassis.  
EXT. BIAS (VDDB) Pin  
• 5V supply input, required to power the circuitry internal to the BCM in a VIA package for communication signals such as SCL, SDA, ADDR etc  
• Voltage to EXT BIAS pin is needed for PMBus™ enable and disable control. It is not needed for PMBus monitoring voltage, current, power or temperature.  
Lower voltage is better. It will help to lower the power dissapation in the internal regulator that is generating 3.3V voltage for communication circuits.  
• Apply voltage to this pin between 4.5V and 9V. The nominal voltage is 5V.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
VDDB Voltage  
SYMBOL  
VVDDB  
CONDITIONS / NOTES  
MIN  
TYP MAX UNIT  
4.5  
5
9
V
mA  
A
Regular  
Operation  
VDDB Current consumption  
Inrush Current Peak  
Turn on time  
IVDDB  
50  
INPUT  
IVDDB_INR  
tVDDB_ON  
VVDDB Slew Rate = 1V/µs  
3.5  
1.5  
Startup  
From VVDDB_MIN to PMBus active  
ms  
SGND Pin  
• This pin is supply return pin for Ext. Bias (VDDB) pin.  
• All input and output signals (SCL, SDA, ADDR) are referenced to SGND pin.  
Note: Keep SGND Signal of the BCM in a VIA package separated from the low voltage side power return terminal (–LO) in electrical design.  
Address (ADDR) Pin  
• This pin programs only a Fixed and Persistent slave address for BCM in a VIA package.  
• This pin programs the address using a resistor between ADDR pin and signal ground.  
• The address is sampled during startup and is used until power is reset.  
• This pin has 10kΩ pullup resistor internally between ADDR pin and internal VDD.  
• 16 addresses are available. Relative to nominal value of internal VDD (VVDD_NOM = 3.3V), a 206.25mV range per address.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
ADDR Input Voltage  
ADDR leakage current  
ADDR registration time  
SYMBOL  
VSADDR  
ISADDR  
CONDITIONS / NOTES  
See address section  
MIN  
TYP MAX UNIT  
0
3.3  
1
V
Regular  
Operation  
MULTI LEVEL  
INPUT  
Leakage current  
From VVDD_IN_MIN  
µA  
ms  
Startup  
tSADDR  
1
BCM® in a VIA Package  
Page 10 of 39  
Rev 1.4  
09/2016  
vicorpower.com  
800 927.9474  
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