BCM3814x60E15A3yzz
Filter Design
Thermal Considerations
The VIA package provides effective conduction cooling from either
of the two module surfaces. Heat may be removed from the top
surface, the bottom surface or both. The extent to which these
two surfaces are cooled is a key component for determining the
maximum power that can be processed by a VIA, as can be seen
from the specified thermal operating area in Figure 1. Since the
VIA has a maximum internal temperature rating, it is necessary to
estimate this internal temperature based on a system-level thermal
solution. For this purpose, it is helpful to simplify the thermal
solution into a roughly equivalent circuit where power dissipation
is modeled as a current source, isothermal surface temperatures
are represented as voltage sources and the thermal resistances are
represented as resistors. Figure 22 shows the “thermal circuit” for
the VIA module.
A major advantage of BCM systems versus conventional PWM
converters is that the transformer based BCM does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as
a function of HI side voltage and LO side current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the high voltage side and low voltage
side stages of the module is sufficient for full functionality and is
key to achieving power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
ꢀ Guarantee low source impedance:
To take full advantage of the BCM module’s dynamic response,
the impedance presented to its HI side terminals must be low
from DC to approximately 5MHz. The connection of the bus
converter module to its power source should be implemented
with minimal distribution inductance. If the interconnect
inductance exceeds 100nH, the HI side should be bypassed
with a RC damper to retain low source impedance and stable
operation. With an interconnect inductance of 200nH, the RC
damper may be as high as 1µF in series with 0.3Ω. A single
electrolytic or equivalent low-Q capacitor may be used in place
of the series RC bypass.
+
θINT_TOP
TC_TOP
–
θHOU
s
–
TC_BOT
θINT_BOT
+
PDISS
ꢀ Further reduce HI side and/or LO side voltage ripple
without sacrificing dynamic response:
s
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the source will appear at the LO
side of the module multiplied by its K factor.
Figure 22 — Double-sided cooling VIA thermal model
In this case, the internal power dissipation is PDISS, θINT_TOP and
θ
INT_BOT are the thermal resistance characteristics of the VIA module
ꢀ Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
and the top and bottom surface temperatures are represented
as TC_TOP and TC_BOT. It is interesting to note that the package
itself provides a high degree of thermal coupling between the
top and bottom case surfaces (represented in the model by the
resistor θHOU). This feature enables two main options regarding
thermal designs:
The module high side/low side voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating HI side range. Even
when disabled, the powertrain is exposed to the applied voltage
and the power MOSFETs must withstand it.
ꢀnSingle side cooling: the model of Figure 22 can be simplified by
calculating the parallel resistor network and using one simple
thermal resistance number and the internal power dissipation
curves; an example for bottom side cooling only is shown in
Figure 23.
Total load capacitance at the LO side of the BCM module shall not
exceed the specified maximum. Owing to the wide bandwidth
and small LO side impedance of the module, low-frequency bypass
capacitance and significant energy storage may be more densely
and efficiently provided by adding capacitance at the HI side of
the module. At frequencies <500kHz the module appears as an
impedance of RLO between the source and load.
In this case, θINT can be derived as follows:
(θINT_TOP + θHOU) • θINT_BOT
θINT_TOP + θHOU + θINT_BOT
(14)
θINT
=
Within this frequency range, capacitance at the HI side appears as
effective capacitance on the LO side per the relationship defined
in Equation 13.
CHI_EXT
K
CLO_EXT
=
(13)
2
This enables a reduction in the size and number of capacitors used
in a typical system.
BCM® in a VIA Package
Page 21 of 41
Rev 2.0
02/2018