BCM380y475x1K2A30
This is similar in form to Eq. (3), where ROꢀT is used to represent the
characteristic impedance of the SAC™. However, in this case a real R on
the input side of the SAC is effectively scaled by K2 with respect
to the output.
Low impedance is a key requirement for powering a high-current, low-
voltage load efficiently. A switching regulation stage should have
minimal impedance while simultaneously providing appropriate
filtering for any switched current. The use of a SAC between the
regulation stage and the point of load provides a dual benefit of scaling
down series impedance leading back to the source and scaling up shunt
capacitance or energy storage as a function of its K factor squared.
However, the benefits are not useful if the series impedance of the SAC
is too high. The impedance of the SAC must be low, i.e. well beyond the
crossover frequency of the system.
Assuming that R = 1 Ω, the effective R as seen from the secondary side is
15.6 mΩ, with K = 1/8 .
A similar exercise should be performed with the additon of a capacitor
or shunt impedance at the input to the SAC. A switch in series with VIꢁ
is added to the circuit. This is depicted in Figure 16.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic components
because magnetizing currents remain low. Small magnetics mean small
path lengths for turns. ꢀse of low loss core material at high frequencies
also reduces core losses.
S
S
SAC™
The two main terms of power loss in the BCM module are:
SAC
V
Vout
K = 1/8
+
–
OUT
C
C
VIN
Vin
K = 1/32
n
ꢁo load power dissipation (PꢁL): defined as the power
used to power up the module with an enabled powertrain
at no load.
n
Resistive loss (ROꢀT): refers to the power loss across
the BCM® module modeled as pure resistive impedance.
Figure 17 — Sine Amplitude Converter with input capacitor
PDISSIPATED = PNL + PROUT
(10)
(11)
A change in VIꢁ with the switch closed would result in a change in
capacitor current according to the following equation:
Therefore,
POUT = PIN – PDISSIPATED = PIN – PNL – PROUT
dVIN
dt
(7)
IC(t) = C
The above relations can be combined to calculate the overall module
efficiency:
Assume that with the capacitor charged to VIꢁ, the switch is opened
and the capacitor is discharged through the idealized SAC. In this case,
POUT
PIN
PIN – PNL – PROUT
=
(12)
h =
•
PIN
IC= IOUT
K
(8)
substituting Eq. (1) and (8) into Eq. (7) reveals:
•
2 •
VIN IIN – PNL – (IOUT
)
ROUT
•
=
C
K2
dVOUT
dt
(9)
•
IOUT
=
VIN IIN
The equation in terms of the output has yielded a K2 scaling factor for
C, specified in the denominator of the equation.
2 •
PNL + (IOUT
•
)
ROUT
= 1 –
(
)
VIN IIN
A K factor less than unity results in an effectively larger capacitance on
the output when expressed in terms of the input. With a K = 1/8 as
shown in Figure 17, C=1 µF would appear as C=64 µF when viewed
from the output.
BCM® Bus Converter
Page 18 of 24
Rev 1.0
12/2013
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