Functional Block Diagram
+OUT
-OUT
START
BIAS
RUN
BIAS
Synchronous
Rectifier
Vcc
ZVS POWER
+IN
TRAIN
Driver
Driver
ZVS POWER
TRAIN
ZVS
-IN
FB
Output OVP
+
-
FB
DC
+
-
DC
Timing
Logic
Reset
-
+
DC
Enable
Period Ramp
+
-
-
+
DC
On-Duty Ramp
LFF
ENB
ENABLE
+5V
Slow Current Limit
DC
Input UVP
Fault
Latch
And
Reset
Logic
+
-
+
-
120us
delay
DC
DC
Input OVP
+
-
CFB2
EA Fault
RFB1
120us
delay
CFB1
+
-
+
-
Over Temp
DC
+
-
FB
Error Amp
+
-
DC
TM
ENB
RSS
TRIM/SS
VREF
1.22V
Temp
Sensor
CSS INT
SGND
Fault
Figure 3 PI3106-00-HVMZ Functional Block Diagram
Picor Corporation • picorpower.com
Preliminary PI3106-00-HVMZ Rev 1.3, Jan 17th, 2012 Page 3 of 15