VL-FS-MDLS16165D-02 REV. A
(MDLS16165D-LV-G)
OCT/2002
PAGE 9 OF 13
5.2
Timing Specifications
At Ta = 0
°C
To +50
°C,
VDD = +5V±5%, VSS = 0V.
Refer to Fig. 2, the bus timing diagram for write mode.
Table 6
Parameter
E Cycle Time
E Rise/Fall Time
E Pulse Width(high, low)
R/W and RS Setup Time
R/W and RS Hold Time
Data Set-up Time
Data Hold Time
Symbol
tc
t
R
,t
F
t
W
t
SU1
t
H1
t
SU2
t
H2
Min.
500
-
230
40
10
80
10
Max.
-
20
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
Refer to Fig. 3, the bus timing diagram for read mode.
Table 7
Parameter
E Cycle Time
E Rise/Fall Time
E Pulse Width(high, low)
R/W and RS Setup Time
R/W and RS Hold Time
Data Output Delay Time
Data Hold Time
Symbol
tc
t
R
,t
F
t
W
t
SU
t
H
t
D
t
DH
Min.
500
-
230
40
10
-
5
Max.
-
20
-
-
-
120
-
Unit
ns
ns
ns
ns
ns
ns
ns
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