VL-FS-MGLS12032C-01 REV. A
(MGLS12032C-LED04)
NOV/2002
PAGE 6 OF 10
3. Interface signals
Table 2
Pin No.
Symbol
VSS
VDD
V0
Description
1
2
3
4
Ground(0V)
Power supply for logic (+5V)
Power supply for LCD driver
Data/Command Select Input
A0
’High’: Display data on DB0-DB7.
’Low’ : Display control data on DB0-DB7.
Chip interface with 68 family MPU:
Read/Write control signal input pin.
R/W = “High”: Read control signals.
R/W = “Low”: Write control signals.
For first LCD driver SED1520:
Chip interfaced with 68 family MPU: Input. Active high.
Enable clock signal input for the 68 family MPU.
For second LCD driver SED1520:
Chip interfaced with 68 family MPU: Input. Active high.
Enable clock signal input for the 68 family MPU.
No connection.
Data input/output (LSB)
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output (MSB)
5
R/W
6
7
E1
E2
8
9
NC
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
LED+
LED-
10
11
12
13
14
15
16
A
Anode of LED backlight.
Cathode of LED backlight.
K
VARITRONIX [ VARITRONIX INTERNATIONAL LIMITED ]
