UC3842A/3843A
OPEN-LOOP LABORATORY TEST FIXTURE
LINEAR INTEGRATED CIRCUIT
V
REF
4.7kΩ
RT
100kΩ
0.1
µF
1
2
3
8
7
6
5
A
0.1
µF
Vcc
Error
Amp
Adjust
4.7kΩ
Isense
Adjust
1kΩ
/ 1W
OUTPUT
5kΩ
4
CT
High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass
capacitors should be connected close to pin 5 in single point GND. The transistor and 5kΩ potentio-meter are used
to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.
UNDER-VOLTAGE LOCKOUT
Icc
Vcc
<15mA
7
ON/OFF Command
to rest of IC
Von=16V
Voff=10V
<1mA
Voff
Von
Vcc
During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to
GND with a bleeder resistor to prevent activating the power switch with output leakage currents.
ERROR AMPLIFIER CONFIGURATION
2.5V
0.5mA
Zi
Zf
2
1
Error amplifier can source or sink up to 0.5mA
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 9
QW-R103-002,D