L6726
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DIAGRAM
1
UTC L6726
17
DTMF
input
10
AD
AM
AR
AT
12
13
Telephone
Line
18
DC
15
16
6
14
4
8
9
5
11
3
2
7
DC output for external
CMOS device
3
1
Mute
(active low)
5
2
4
1.Impedance to line and radio interference suppression.
2.Transmit gain and frequency response network.
3.Receive gain and frequency response network.
4.Side tone balance network.
5.DC-supply components.
MUTE
RL=0~4KΩ
0 Ω when artificail line is used
VM
5H+5H
IL
ARTIFICAIAL
LINE
ZMIC=350 Ω
+LINE
+
MIC
C1
1μF
RLoad
=400Ω+400Ω
V3
DTMF
UTC 6726
with external
component
see fig 3
600Ω
IDC
VL
V2
+
ZRec=350 Ω
REC
V4
E=48.5V
V1
VDC
-LINE
C1= 1μF when artificial line is used
470μF when not used
Fig. 1 Test setup without rectifier bridge
MUTE
VM
RL=0~4KΩ
5H+5H
Uz=(15 ~16)V
IL
ZMIC=350 Ω
+LINE
+
MIC
RLoad
=400Ω+400Ω
C1
V3
DTMF
IDC
UTC 6726
with external
component
see fig 3
1μF
600Ω
V2
VL
+
ZRec=350 Ω
REC
V4
E=50V
V1
VDC
-LINE
Fig. 2 Test setup with rectifier bridge
UNISONIC TECHNOLOGIES CO., LTD
4 of 13
QW-R108-015, C
www.unisonic.com.tw
UTC [ Unisonic Technologies ]
