13N50
Preliminary
Power MOSFET
TEST CIRCUITS AND WAVEFORMS
D.U.T.
+
V
DS
-
I
SD
L
Driver
R
G
Same Type
as D.U.T.
V
DD
V
GS
* dv/dt controlled by R
G
* I
SD
controlled by pulse period
Fig. 1A Peak Diode Recovery dv/dt Test Circuit
V
GS
(Driver)
D=
Gate Pulse Width
Gate Pulse Period
10V
I
FM
, Body Diode Forward Current
I
SD
(D.U.T.)
I
RM
Body Diode Reverse Current
V
DS
(D.U.T.)
di/dt
Body Diode Recovery dv/dt
V
SD
V
DD
Body Diode
Forward Voltage Drop
Fig. 1B Peak Diode Recovery dv/dt Waveforms
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R502-362.c