US3004/US3005
For 1.5V output, Rt can be shorted and Rb left open.
However it is recommended to leave the resistor dividers
as shown in the typical application circuit so that the
output voltage can be adjusted higher to account for the
trace resistance in the final board layout.
It is also recommended that an external filter to be added
on the linear regulators to reduce the amount of the high
frequency ripple at the output of the regulators. This can
simply be done by the resistor capacitor combination
as shown in the application circuit.
For US3005 that include the resistor dividers internally,
Vfb1 can be directly connected to the output voltage
without any external resistors for a preset voltage of 2.5V
. The disadvantage is that the output voltage is not ad-
justable anymore. The application circuit given for
Pentium II can use either US3004 or US3005 family of
parts for maximum flexibility.
Soft Start Capacitor Selection
The soft start capacitor must be selected such that dur-
ing the start up when the output capacitors are charging
up, the peak inductor current does not reach the current
limit treshold. A minimum of 1uF capacitor insures this
for most applications. An internal 10uA current source
charges the soft start capacitor which slowly ramps up
the inverting input of the PWM comparator Vfb3. This
insures the output voltage to ramp at the same rate as
the soft start cap thereby limiting the input current. For
example, with 1uF and the 10uA internal current source
the ramp up rate is (DV/ Dt)=I/C = 1V/100mS. Assum-
ing that the output capacitance is 9000uF, the maxi-
mum start up current will be:
I=9000uF*(1V/100mS)=0.09A
Input Filter
Disabling the LDO Regulators
It is highly recommended to place an inductor between
the system 5V supply and the input capacitors of the
switching regulator to isolate the 5V supply from the
switching noise that occurs during the turn on and off of
the switching components. Typically an inductor in the
range of 1 to 3 uH will be sufficient in this type of appli-
cation.
The LDO controllers can easily be disabled by connect-
ing the feedback pins, Vfb1 and Vfb2 to a voltage higher
than 2.5V such as 5V for all devices.
Switcher Output Voltage Adjust
As it was discussed earlier,the trace resistance from
the output of the switching regulator to the Slot 1 can be
used to the circuit advantage and possibly reduce the
number of output capacitors, by level shifting the DC
regulation point when transitioninig from light load to full
load and vice versa. To account for the DC drop, the
output of the regulator is typically set about half the DC
drop that results from light load to full load. For example,
if the total resistance from the output capacitors to the
Slot 1 and back to the GND pin of the part is 5mW and if
the total DI, the change from light load to full load is
14A, then the output voltage measured at the top of the
resistor divider which is also connected to the output
capacitors in this case, must be set at half of the 70 mV
or 35mV higher than the DAC voltage setting. To do this,
the top resistor of the resistor divider(R12 in the applica-
tion circuit) is set at 100W, and the R13 is calculated.
For example, if DAC voltage setting is for 2.8V and the
desired output under light load is 2.835V, then R13 is
calculated using the following formula :
Switcher External Shutdown
The best way to shutdown the switcher is to pull down
on the soft start pin using an external small signal tran-
sistor such as 2N3904 or 2N7002 small signal MOSFET.
This allows slow ramp up of the output, the same as the
power up.
R13= 100*{Vdac /(Vo - 1.004*Vdac)} [W]
R13= 100*{2.8 /(2.835 - 1.004*2.800)} = 11.76 kW
Select 11.8 kW , 1%
Note: The value of the top resistor must not exceed
100W. The bottom resistor can then be adjusted to raise
the output voltage.
Rev. 1.2
12/8/00
4-13
UNISEM [ UNISEM ]
