US2075
Note 1 :
Low duty cycle pulse testing with Kelvin con-
nections are required in order to maintain accurate data.
PIN DESCRIPTIONS
PIN #
3
6
7
PIN SYMBOL
Vfb
Vout
V5
PIN DESCRIPTION
A resistor divider from this pin to the output of the switching regulator and
ground sets the core supply voltage.
The output of the linear regulator. A minimum of a 10uF capacitor must be
connected from this pin to ground to insure stability. This voltage is set at 3.30V typ.
The input pin of the regulator. Typically a large storage capacitor is connected from
this pin to ground to insure that the input voltage does not sag below the minimum
drop out voltage during the load transient response. This pin must always be 1.3V
higher than Vout in order for the device to regulate properly.
This pin is connected to the IC substrate and must be connected to the lowest
potential in the system. It is also connected to the Tab of the package. A high
frequency capacitor must be connected from V12 to this pin to insure proper operation.
The PWM output of the switching controller. This pin is a totem pole drive that is
connected to the gate of the power MOSFET. A resistor may be placed from this
pin to the gate in order to reduce switching noise.
A resistor is connected from this pin to the Vfb pin to set the output ripple voltage.
See application note for more details.
This pin is connected to the 12V supply voltage A high frequency cap must be
connected from this pin to the GND pin of the IC.
4
Gnd
1
Drv
5
2
Vhyst
V12
BLOCK DIAGRAM
V12
2
Vhyst
5
Vfb
3
V5
7
Vout
6
Vref
PWM Control
Drv
1
UVLO
Gnd
4
1.25V
7.5A LDO
2075blk1-1.0
Figure 1 - Simplified block diagram of the US2075
Rev. 1.2
4/26/98
4-3
UNISEM [ UNISEM ]
