CHT4699-QDG
Evaluation mother board
36-44GHz Variable Attenuator
■ Compatible with the proposed footprint.
■ Based on typically Ro4003 / 8mils or equivalent.
■ Using a micro-strip to coplanar transition to access the package.
■ Recommended for the implementation of this product on a module board.
■ Decoupling capacitors of 10nF ±10% are recommended for all DC accesses.
■ See application note AN0017 for details.
Definition of the Sij reference planes
The reference planes used for Sij
measurements given above are symmetrical
from the symmetrical axis of the package
(see drawing beside). The input and output
reference planes are located at 3.18mm
offset (input wise and output wise
respectively) from this axis. Then, the given
Sij parameters incorporate the land pattern of
the evaluation motherboard recommended in
paragraph "Evaluation mother board".
3.1
8
3.1
8
Ref. : DSCHT4699-QDG2118 - 27 Apr 12
10/12
Specifications subject to change without notice
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Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
