CHR3861-QEG
Electrical Characteristics
Tamb = +25°C, VD = VD1 = 4V
Configuration 1: High linearity with GC4 fixed at 0V
Symbol
FRF
FLO
FIF
Gc
∆G
NF
Parameter
RF frequency range
LO frequency range
IF frequency range
Conversion gain @ min. attenuation
(1)
Gain control range with only Gc3
Noise Figure @ min. attenuation, for
IF>0.1GHz
Image rejection
(1)
LO Input power
Input IP3@ at Gc max.
DC drain voltage
Total drain current at Gc max.
LNA DC gate voltage
LO buffer & X2 DC voltage
Gain control DC voltage
Gain control DC voltage
6-9GHz Down Converter
Min
5.9
3.0
DC
Typ
Max
9.0
12.5
3.5
Unit
GHz
GHz
GHz
dB
dB
dB
12
9
2.5
Im_rej
PLO
IIP3
VD, VD1
Id
VG
B
GC3
GC4
15
0
1
4
380
-0.3
-4
-1.5
0
0
0
dBc
dBm
dBm
V
mA
V
V
V
V
(1) An external combiner 90° is required on I / Q.
These values are representative of on board measurements as defined on the drawing at
paragraph “Evaluation mother board”.
Note: Id not affected by GC3, GC4.
Ref. : DSCHR3861-QEG1192 - 11 Jul 11
2/18
Specifications subject to change without notice
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
