CHP3010-QFG
L-Band 6-Bit Digital Phase Shifter
Typical Bias Conditions
The following two options are possible for the positive value of the biasing circuit without
impact on the RF performances.
Option 1
Symbol
V+
PIN No
32
Parameter
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Voltage
Control Input Voltage
Values
+5
Unit
V
V-
31
-5
V
V+
30
NC
Bit1 to Bit6
Option 2
Symbol
V+
29 to 24
0 / +3.3
V
PIN No
32
Parameter
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Voltage
Control Input Voltage
Values
+3.3
Unit
V
V-
31
-5
V
V+
30
+3.3
V
Bit1 to Bit6
29 to 24
0 / +3.3
V
Device thermal performances
Since all the FETs of the RF part of the circuit work under null DC drain-source voltage, while
the DC-interface power consumption amounts to less than 20mW
Ref. : DSCHP3010-QFG2072 - 12 Mar 12
4/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33(0) 1 69 34 34
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
