25W Power Packaged Transistor
CHK025A-SOA
Typical Performance on Demonstration Board (Ref. 61500252)
Calibration and measurements are done on the connector reference accesses of the
demonstration boards.
Tcase = +25°C, Pulsed mode
(1)
Measured Pout, Gain, PAE & Id
F = 4GHz, V
DS
= 50V, I
D_Q
= 200mA
60
55
3.0
PAE
2.5
Pout (dBm), Gain (dB) & PAE (%)
50
45
40
35
30
25
20
15
10
5
0
10
15
20
25
30
35
2.0
Id
1.5
Gain
1.0
0.5
0.0
Input Power (dBm)
Measured Pout , PAE & Gain
Pin = 32.5 dBm, V
DS
= 50V, I
D_Q
= 200mA
55
50
45
PAE
50
49
48
47
Gain (dB) & PAE (%)
40
35
30
25
20
15
45
44
43
Gain
42
10
5
0
3.5
3.6
3.7
3.8
3.9
4
4.1
4.2
4.3
4.4
41
40
39
Frequency (GHz)
(1)
Input RF and gate voltage are pulsed. Conditions are 25µs width, 10% duty cycle and 1µs
offset between RF and DC pulse.
Ref. : DSCHK025ASOA3021 - 21 Jan 13
8/14
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Pout (dBm)
Pout
46
Drain Current (A)
Pout
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
