PRELIMINARY
QPL6202
®
Ultra-Low Noise, High Gain LNA
Pin Configuration and Description
Top View
Pad No.
Label
Description
1
Vbias
Sets the Icq bias point for the device.
RF Input pin. A DC Block is required.
2
6
RF In
A high voltage (>1.17V) turns off the device. If the pin is pulled to ground or driven with a
voltage less than 0.63V, then the device will operate under LNA ON state.
Shut Down
RF Output pin. DC bias will also need to be injected through a RF bias
choke/inductor for operation.
RF Out /
DCBias
7
3, 4, 5, 8
NC
No electrical connection. Provide grounded land pads for PCB mounting integrity.
Backside
Paddle
RF/DC ground. Use recommended via pattern to minimize inductance and thermal
resistance; see PCB Mounting Pattern for suggested footprint.
RF/DC
GND
Data Sheet Rev D
Subject to change without notice
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TRIQUINT [ TRIQUINT SEMICONDUCTOR ]
