QPD1020
2.7 – 3.5 GHz, 50 V, 30 W GaN RF Input-Matched Transistor
2.7 – 3.1 GHz Application Circuit - Schematic
Bias-up Procedure
1. Set VG to -4 V.
Bias-down Procedure
1. Turn off RF signal.
2. Set ID current limit to 60 mA.
3. Apply 50 V VD.
2. Turn off VD
3. Wait 2 seconds to allow drain capacitor to discharge
4. Turn off VG
4. Slowly adjust VG until ID is set to 52.5 mA.
5. Set ID current limit to 120 mA (Pulsed operation)
6. Apply RF.
Datasheet Rev. B, Sept. 18, 2017 | Subject to change without notice
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