0.5-µm
HFET 2MI
Process Data Sheet
4.6 µm PLATING
CAP TOP PLATE
2000 Å NITRIDE
0.75 µm FIRST METAL
TaN RESISTOR
GATE
ACTIVE REGION
OHMIC METAL (EXCEPT VIA)
SEMI-INSULATING GaAs SUBSTRATE
Features
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0.5-µm amplifier transistors
0.5-µm switch transistors
0.5-µm diodes
Device passivation
High-Q passives
MIM capacitors
TaN resistors
GaAs resistors
2 metal layers
Air bridges
Substrate vias
Operation up to V
d
= 10 V
Up to 20 GHz
Communications
Space
Military
Power amplifiers
Driver amplifiers
AGC amplifiers
Limiting amplifiers
Transimpedance amplifiers
Differential amplifiers
VIA UNDER CAP
0.5-µm 2MI Process Cross Section
Applications
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General Description
The 0.5-µm Heterostructure FET (HFET) process is a de-
pletion-mode 2MI (2-metal-interconnect) process for appli-
cations through 20 GHz. The HFET I-V characteristics pro-
vide for high power, high linearity, extraordinary transcon-
ductance uniformity and high breakdown voltages. Passives
include 2 thick-metal interconnect layers, precision TaN
resistors, GaAs resistors, MIM capacitors and through-
substrate vias. The capacitor-over-via process aides in size
compaction and offers excellent grounds at higher frequen-
cies.
500 West Renner Road
Richardson, Texas 75080
Semiconductors for Communications, Space and Military
www.TriQuint.com
Specifications are subject to change.
Page 1 of 6; 1/30/06
Phone: 972-994-8200
Foundry: 972-994-4545
Email: info@triquint.com
TRIQUINT [ TRIQUINT SEMICONDUCTOR ]
