T
R
I
Q
U
I
N
T
S E M I C O N D U C T O R, I N C .
FBIN
11
S1
10
REFCLK
9
S0
8
F1
7
F0
6
GND
5
GA1088
4
VDD
3
TEST
12
VDD
13
Phase
Detector
VCO
Q10
Q9
Q0
14
2
11-Output
Configurable
Clock Buffer
Features
• Wide frequency range:
18 MHz to 105 MHz
• Output configurations:
three outputs at
1
/
2
f
REF
three outputs at f
REF
four outputs at f
REF
with adjustable phase or
two outputs at f
REF
four outputs at 2x f
REF
four outputs at 2x f
REF
with adjustable phase
SYSTEM TIMING
PRODUCTS
GND
15
Q1
Q2
16
17
MUX
Divide Logic
÷4, ÷6, or ÷8
Output Buffers
Group B
Phase
Select
1
GND
28
Q8
Q7
Group
A
Group
C
27
VDD
18
26
VDD
19
20
21
22
23
24
25
GND
Q3
Q4
VDD
Q5
Q6
GND
TriQuint’s GA1088 is a configurable clock buffer which generates 11
outputs, operating over a wide range of frequencies — from 18 MHz to
105 MHz. The outputs are available at either 1x and 2x or at 1x and
1
/
2
x
the reference clock frequency, f
REF
. When one of the Group A outputs (Q0–
Q2) is used as feedback to the PLL, all Group A outputs will be at f
REF
, and
all Group B (Q3–Q6) and Group C (Q7–Q10) outputs will be at 2x f
REF
.
When one of the Group B outputs is used as feedback to the PLL, all Group
A outputs will be at
1
/
2
x f
REF
and all Group B and Group C outputs will
be at f
REF
.
A very stable internal Phase-Locked Loop (PLL) provides low-jitter
operation. This completely self-contained PLL requires no external
capacitors or resistors. The PLL’s voltage-controlled oscillator (VCO) has a
frequency range from 280 MHz to 420 MHz. By feeding back one of the
output clocks to FBIN, the PLL continuously maintains frequency and
phase synchronization between the reference clock (REFCLK) and each of
the outputs. The Shift Select pins select the phase shift (–2t, –t, 0, or +t)
for Group C outputs (Q7–Q10) with respect to REFCLK. The phase shift
increment (t) is equivalent to the VCO’s period (1/f
VCO
).
TriQuint’s patented output buffer design delivers a very low output-to-
output skew of 150 ps (max). The GA1088’s symmetrical TTL outputs are
capable of sourcing and sinking 30 mA.
• Selectable Phase Shift:
–2t, –t, 0, and +t (t = 1/f
VCO
)
• Low output-to-output skew:
150 ps (max) within a group
• Near-zero propagation delay
–350 ps + 500 ps (max) or
–350 ps +700 ps (max)
• TTL-compatible with 30 mA
output drive
• 28-pin J-lead surface-mount
package
For additional information and latest specifications, see our website:
www.triquint.com
1
TRIQUINT [ TRIQUINT SEMICONDUCTOR ]
