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TP2050 参数 Datasheet PDF下载

TP2050图片预览
型号: TP2050
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声50W ( 8Ω )功率级 [STEREO 50W (8ヘ) POWER STAGE]
分类和应用:
文件页数/大小: 13 页 / 298 K
品牌: TRIPATH [ TRIPATH TECHNOLOGY INC. ]
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Tripath Technology, Inc. - Technical Information  
A P P L I C A T I O N I N F O R M A T I O N  
Basic Op e ratio n  
The TP2050 is a MOSFET output stage that level-shifts the signal processor’s 5V switching patterns  
to the power supply voltages and drives the power MOSFETs. The power MOSFETs are  
complementary N-channel/P-channel devices configured in full-bridges and are used to supply power  
to the output load. The outputs of the power MOSFETs must be low pass filtered to remove the high  
frequency switching pattern. A residual voltage from the switching pattern will remain on the speaker  
outputs when the recommended output LC filter is used, but this signal is outside of the audio band  
and will not affect audio performance.  
C i r cu i t B o ard L a yo u t  
The TP2050 is a power (high current) power stage that operates at relatively high switching  
frequencies. The output of the amplifier switches between VCC and GND at high speeds while  
driving large currents. This high-frequency digital signal is passed through an LC low-pass filter to  
recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and  
speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the  
energy in the output inductance. To avoid subjecting the TP2050 to potentially damaging voltage  
stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout  
and application circuit be used for all applications and only be deviated from after careful analysis of  
the effects of any changes.  
The following components are important to place near their associated TP2050 pins and are ranked  
in order of layout importance, either for proper device operation or performance considerations.  
-
The capacitors CHBR provide high frequency bypassing of the amplifier power supplies and  
will serve to reduce spikes across the supply rails. CHBR should be kept within 1/8” (3mm)  
of the VCC pins. Please note that the four VCC pins must be decoupled separately. In  
addition, the voltage rating for CHBR should be 50V as this capacitor is exposed to the full  
supply range. Similarly, capacitors CS should be located as close as possible to their  
respective pins on the TP2050.  
In general, to enable placement as close to the TP2050, and minimize PCB parasitics, the capacitors  
listed above should be surface mount types (with the exception of the bulk CHBR capacitor).  
T P 2 0 5 0 O u t p u t C a p a b i l i t y  
The TP2050 can drive two 8 Ohm loads with 40 Watts each at less than 0.05% THD+N. The  
maximum sustained amplifier output power will be determined by a number of factors including the  
TP2050 junction temperatures, the load impedance and the power supply voltage.  
Tripath does not recommend driving loads below 6 Ohms single ended as the amplifier efficiency will  
be reduced and the amplifier will reach it’s current limit at relatively low power output levels. With the  
outputs connected in parallel, however, the TP2050 is capable of driving single channel loads down  
to 4 Ohms with very high power capability.  
Paralleled Outputs  
For stereo mode operation, the TP2050 is a dual full bridge. For parallel mode operation, the TP2050  
can be configured as a single full bridge with double current capability by connecting the CONFIG pin  
to the VDD pin of the TP2050. Please refer to the Application/Test Diagram for parallel operation.  
10  
TP2050– KL/1.0/07.05