Tripath Technology, Inc. - Technical Information
APPLICATION / TEST CIRCUIT WITH SINGLE ENDED INPUTS AND
FILTERLESS OUTPUTS
TAA2009
C
I
1.0uF
SINGLE ENDED
AUDIO INPUT
C
P
10uF
(Pin 30)
C
A
1.0uF
(Pin 30)
5V
MUTE
7
VDD1
IN1P
1
9
OUTP1
+
-
IN1M
32
R
I
C
I
1.0uF
C1
31
Processing
&
Modulation
GAIN
CONTROL
PGND1
VDD1
R
L
6Ω to 16Ω
GAIN0
3
GAIN1
22
BIASCAP
29
12
OUTM1
V5
PGND1
8
VDD2
C
P
10uF
(Pin 27)
SINGLE ENDED
AUDIO INPUT
R
I
(Pin 4)
C
I
1.0uF
FAULT
C2
26
IN2P
24
16
OUTP2
+
-
IN2M
25
C
I
1.0uF
5
R
REF
20.0KΩ, 1%
REF
Processing
&
Modulation
PGND2
VDD2
R
L
6Ω to 16Ω
13
OUTM2
18
CPUMP
19
DCAP
D
CP
C
CP
1uF
To pin 20 (VDDA)
PGND2
CPUMP
VDDA
C
D
0.1uF
D
CP
To Pin 21
18
+
VDD
1MΩ
20
23
C
P
1uF
C
S
0.1uF
C
S
0.1uF
To Pins
2, 28
27
INL
6
SLEEP
V5D
DGND
V5A
AGND
AGND
5VGEN
21
N.C.
2
C
S
1.0uF
4
28
VDD1
PGND1
10
11
C
SW
0.1uF
+
VDD
C
SW
To Pin 21
C
S
1.0uF
100uF, 16V
30
VDD2
15
14
C
SW
0.1uF
+
17
SUB
C
SW
PGND2
100uF, 16V
Note: Analog and Digital/Power Grounds must
be connected locally at the TAA2009
Analog Ground
Power Ground
9
TAA2009 –KLi/1.02/ 05.06
TRIPATH [ TRIPATH TECHNOLOGY INC. ]
