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TA2021B 参数 Datasheet PDF下载

TA2021B图片预览
型号: TA2021B
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声25W ( 4欧姆) CLASS -T数字音频放大器驱动器使用数字功率处理( DPP )技术 [STEREO 25W (4OHM) CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING (DPP) TECHNOLOGY]
分类和应用: 驱动器驱动程序和接口接口集成电路音频放大器
文件页数/大小: 12 页 / 267 K
品牌: TRIPATH [ TRIPATH TECHNOLOGY INC. ]
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Tri path Technol og y, I nc. - Techni cal I nformati on
Application Information
Circuit Board Layout
The TA2021B is a power amplifier which operates at relatively high switching frequencies. The
outputs of the amplifier switch between VDD and PGND at frequencies as high as 1MHz while
driving high currents. This high-frequency digital signal is passed through an LC low-pass filter to
recover the amplified audio signal. Because the TA2021B drives the inductive LC output filters
and speaker load, the amplifier outputs can be pulled above VDD and below PGND by the stored
energy in the output inductance. To avoid subjecting the TA2021B to potentially damaging
voltage stress, it is critical to have a good printed circuit board layout to minimize parasitic effects
caused by excessive trace inductance/capacitance. It is recommended that Tripath’s layout and
application circuit be used as closely as possible for all applications and only be deviated from
after careful analysis of the effects of any changes.
Output Stage layout Considerations and Component Selection Criteria
Proper PCB layout and component selection is a major step in designing a reliable TA2021B
power amplifier. The supply pins require proper decoupling with correctly chosen components to
achieve optimal reliability. The output pins need proper protection to keep the outputs from going
below ground and above VDD.
The above layout shows component placement and routing for channel 1 (the same design
criteria applies to channel 2). This shows that C3, a 0.1uF surface mount 0805 capacitor, should
be the first component placed and must decouple VDD1 (pins 29 and 30) directly to PGND1
(pin35). C2, a low ESR, electrolytic capacitor, should also decouple VDD1 directly to PGND1.
Both C2 and C3 may decouple VDD1 to a ground plane, but it is critical that the return path to the
PGND1 pin of the TA2021B, whether it is a ground plane or a trace, be a short and direct low
impedance path. Effectively decoupling VDD will shunt any power supply trace length inductance.
The diodes and inductors shown are for channel 1’s outputs. D1, D3, and L2 connect to the
OUTP1 pin and D2, D4, and L3 connect to the OUTM1 pin of the TA2021B. Each output must
have Schottky or Ultra Fast Recovery diodes placed near the TA2021B, preferably immediately
8
TA2021B – 3.0/04.03