TMC5161 DATASHEET (Rev. 1.01 / 2018-NOV-20)
44
DRIVER REGISTER SET (0X6C…0X7F)
R/W
Addr
n
Register
Description / bit names
chopper and driver configuration
See separate table!
Range [Unit]
reset default=
0x10410150
RW
0x6C
32 CHOPCONF
coolStep smart current control register
and stallGuard2 configuration
See separate table!
W
0x6D
25 COOLCONF
dcStep
(DC)
automatic
commutation
configuration register (enable via pin DCEN
or via VDCMIN):
bit 9… 0:
DC_TIME: Upper PWM on time
limit for commutation (DC_TIME *
1/fCLK). Set slightly above effective
blank time TBL.
bit 23… 16: DC_SG: Max. PWM on time for
step loss detection using dcStep
stallGuard2 in dcStep mode.
(DC_SG * 16/fCLK)
W
0x6E
24 DCCTRL
Set
slightly
higher
than
DC_TIME/16
0=disable
Hint: Using a higher microstep resolution or
interpolated operation, dcStep delivers a
better stallGuard signal.
DC_SG is also available above VHIGH if
vhighfs is activated. For best result also set
vhighchm.
DRV_
32
stallGuard2 value and driver error flags
See separate table!
Voltage PWM mode chopper configuration
See separate table!
R
0x6F
0x70
STATUS
reset default=
0xC40C001E
W
22 PWMCONF
Results of stealthChop amplitude regulator.
These values can be used to monitor
automatic PWM amplitude scaling (255=max.
voltage).
bit 7… 0
PWM_SCALE_SUM:
0…255
Actual PWM duty cycle. This
value is used for scaling the
values CUR_A and CUR_B read
from the sine wave table.
R
0x71
9+8 PWM_SCALE
bit 24… 16 PWM_SCALE_AUTO:
signed
9 Bit signed offset added to the -255…+255
calculated PWM duty cycle. This
is the result of the automatic
amplitude regulation based on
current measurement.
These automatically generated values can be
read out in order to determine a default /
power up setting for PWM_GRAD and
PWM_OFS.
R
0x72
8+8 PWM_AUTO
bit 7… 0
PWM_OFS_AUTO:
Automatically determined offset
value
0…255
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TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
