TMC5031 DATASHEET (Rev. 1.11 / 2016-APR-28)
8
Pin
Number Type
Function
5V supply input for digital circuitry within chip and charge pump.
Attach 470nF capacitor to GND (GND plane). May be supplied by
5VOUT. A 2.2Ω resistor is recommended for decoupling noise from
5VOUT. When using an external supply, make sure, that VCC comes
up before or in parallel to 5VOUT.
VCC
33
Connect the exposed die pad to a GND plane. Provide as many as
possible vias for heat transfer to GND plane.
DIE_PAD
-
GND
Table 2.1 Low voltage digital and analog power supply pins
Pin
Number Type
Function
Charge pump driver output. Outputs 5V (GND to VCC) square wave
with 1/16 of internal oscillator frequency.
Charge pump capacitor input: Provide external 22nF / 50V capacitor
to CPO.
CPO
35
36
37
O(VCC)
CPI
I(VCP)
Output of charge pump. Provide external 100nF capacitor to VS.
VCP
Table 2.2 Charge pump pins
Pin
Number Type
Function
Tristate interrupt output. Can be programmed to provide interrupt
output based on ramp generator flags RAMP_STAT bits 4, 5, 6 & 7
(poscmp_enable=1).
INT
1
O (Z)
Tristate position compare output for motor 1 (poscmp_enable=1).
PP
2
O (Z)
Chip select input of SPI interface
Serial clock input of SPI interface
Data input of SPI interface
Tristate data output of SPI interface (enabled with CSN=0)
Clock input. Tie to GND using short wire for internal clock or supply
external clock. The first high signal disables the internal oscillator
until power down.
CSN
SCK
SDI
SDO
CLK
3
4
5
8
I
I
I
O (Z)
I
11
Right reference switch input for motor 2
Left reference switch input for motor 2
Right reference switch input for motor 1
Left reference switch input for motor 1
Enable input for motor drivers. The power stage becomes switched
off (all motor outputs floating) when this pin becomes driven to a
high level. Tie to GND for normal operation.
Test mode input. Puts IC into test mode. Tie to GND for normal
operation.
REFR2
REFL2
REFR1
REFL1
25
26
27
28
29
I
I
I
I
I
DRV_ENN
TST_MODE
-
48
I
Unused pins – no internal electrical connection. Leave open or tie to
GND for compatibility with future devices.
13, 23, 38 N.C.
Table 2.3 Digital I/O pins (all related to VCC_IO supply)
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