TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.04 • 2018-Dec-11
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The ADC engine interfaces the integrated ADC channels and maps raw ADC values to signed 16 bit (s16)
values for the inner FOC current control loop based on programmable offset and scaling factors. The
FOC torque PI controller forms the inner base component including required transformations (Clark, Park,
inverse Park, inverse Clark). All functional blocks are pure hardware.
4.2 Communication Interfaces
The TMC4671 is equipped with an SPI interface for access to all registers of the TMC4671. The SPI interface
is the main application interface.
An additional UART interface is intended for system setup. With that interface, the user can access all
registers of the TMC4671 in parallel to the application accessing them via the SPI communication interface
- via the user’s firmware or via evaluation boards and the TMCL-IDE. The data format of the UART interface
is similar to the SPI communication interface - SPI 40 bit datagrams sent to the TMC4671 and SPI 40 bit
datagrams received by the MCU vs. five bytes sent via UART and five bytes received via UART. Sending
a burst of different real-time data for visualization and analysis via the TMCL-IDE can be triggered using
special datagrams. With that, the user can set up an embedded application together with the TMCL-IDE,
without having to write a complex set of visualization and analysis functions. The user can focus on its
application.
The TMC4671 is also equipped with an additional SPI master interface (TRINAMIC Real-time Monitoring
Interface, DBGSPI) for high-speed visualization of real-time data together with the TMCL-IDE.
4.2.1 SPI Slave User Interface
The SPI of the TMC4671 for the user application has an easy command and control structure. The TMC4671
user SPI acts as a slave. The SPI datagram length is 40 bit with a clock rate up to 1 MHz (8 MHz in future
chip version).
• The MSB (bit#39) is sent first. The LSB (bit#0) is sent last.
• The MSB (bit#39) is the WRITE_notREAD (WRnRD) bit.
• The bits (bit#39 to bit#32) are the address bits (ADDR).
• Bits (bit#31) to (bit#0) are 32 data bits.
The SPI of the TMC4671 immediately responses within the actual SPI datagram on read and write for
ease-of-use communication and uses SPI mode 3 with CPOL = 1 and CPHA = 1.
Figure 7: SPI Datagram Structure
A simple SPI datagram example:
0x8100000000 // 1st write 0x00000000 into address 0x01 (CHIPINFO_ADDR)
0x0000000000 // 2nd read register 0x00 (CHIPINFO_DATA), returns 0x34363731 <=> ACSII "4671"
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