TMC332 DATA SHEET (V. 2.04 / November 9, 2009)
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3 Table of Figures
Figure 1: Package Outline Drawing FBGA144 – (JEDEC MO-192 VAR DAD-1) ................................... 7
Figure 2: TMC332 Functional Block Diagram ......................................................................................... 8
Figure 3: Outline of a typical TMC332 setup with TMC428 and µC ........................................................ 9
Figure 4: Outline of a TMC332 Setup with TMC457 and µC .................................................................. 9
Figure 5: Schematic with over current detection circuit ......................................................................... 13
Figure 6: Example layout with TMC603 ................................................................................................ 14
Figure 7: Effects of the Encoder clear mode bits .................................................................................. 23
Figure 8 - Conversion start timing for current meaurement .................................................................. 24
Figure 9 - TMC332 current regulation on two phase motors ................................................................. 25
Figure 10 - TMC332 current regulation on three phase motors ............................................................ 25
Figure 11: Full step chopper modes ...................................................................................................... 27
4 Table of Tables
Table 5-1: TMC332-FG144 Pinning ........................................................................................................ 6
Table 5-2: Dimensions of FBGA144 (Note: BSC = Basis Spacing Between Centers) ........................... 7
Table 8-1: TMC332 register address mapping (read access) ............................................................... 15
Table 8-2: TMC332 register address mapping (write access) .............................................................. 16
Table 8-3: TMC332 functional register description ............................................................................... 18
Table 9-1: Description of the enc_clr_mode bits ................................................................................... 22
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