TMC260 and TMC261 DATASHEET (Rev. 2.05 / 2012-NOV-05)
7
Pin
Number Type
Function
DI VIO SPI serial data input.
(Scan test input in test mode.)
SDI
15
SCK
16
DI VIO Serial clock input of SPI interface.
(Scan test shift enable input in test mode.)
Digital and analog low power GND.
GND
17, 39,
44
CSN
ENN
18
19
DI VIO Chip select input for the SPI interface. (Active low.)
DI VIO Power MOSFET enable input. All MOSFETs are switched off when
disabled. (Active low.)
CLK
21
DI VIO System clock input for all internal operations. Tie low to use the
on-chip oscillator. A high signal disables the on-chip oscillator until
power down.
VHS
VS
TST_ANA
SG_TST
VCC_IO
35
36
37
38
40
High-side supply voltage (motor supply voltage - 10V)
Motor supply voltage
AO VIO Reserved. Do not connect.
DO VIO stallGuard2 output. Signals a motor stall. (Active high.)
Input/output supply voltage VIO for all digital pins. Tie to digital
logic supply voltage. Operation is allowed in 3.3V and 5V systems.
DI VIO Direction input. Sampled on an active edge of the STEP input to
determine stepping direction. Sampling a low increases the
microstep counter, while sampling a high decreases the counter. A
60-ns internal glitch filter rejects short pulses on this input.
DI VIO Step input. Active edges can be rising or both rising and falling, as
controlled by the DEDGE mode bit. A 60-ns internal glitch filter
rejects short pulses on this input.
DIR
41
STEP
42
43
TST_MODE
DI VIO Test mode input. Puts IC into test mode. Tie to GND for normal
operation.
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