TMC249 / TMC249A DATA SHEET (V2.09 / 2009-Jul-30)
28
SPI Interface Timing
tES
ENN
CSN
t1
tCL
tCH
t1
t1
SCK
SDI
tDU
tDH
bit11
tD
bit10
bit0
bit0
tZC
SDO
bit11
bit10
Propagation Times
(3.0 V VCC 5.5 V, -40°C Tj 150°C; VIH = 2.8V, VIL = 0.5V; tr, tf = 10ns; CL = 50pF,
unless otherwise specified)
Symbol
fSCK
Parameter
Conditions
Min
DC
50
Typ
Max
Unit
MHz
ns
SCK frequency
ENN = 0
4
t1
SCK stable before and after CSN
change
tCH
tCL
tDU
tDH
tD
Width of SCK high pulse
Width of SCK low pulse
SDI setup time
100
100
40
ns
ns
ns
ns
ns
ns
ns
µs
SDI hold time
50
SDO delay time
CL = 50pF
*)
40
100
tZC
tES
tPD
CSN high to SDO high impedance
ENN to SCK setup time
50
30
CSN high to LA / HA / LB / HB
output polarity change delay
**)
3
5
tOSC + 4
7
tLD
Load indicator valid after LA / HA /
LB / HB output polarity change
µs
*) SDO is tristated whenever ENN is inactive (high) or CSN is inactive (high).
**) Whenever the PHA / PHB polarity is changed, the chopper is restarted for that phase. However, the chopper does not
switch on, when the SRA resp. SRB comparator threshold is exceeded upon the start of a chopper period.
Using the SPI interface
The SPI interface allows either cascading of multiple devices, giving a longer shift register, or working
with a separate chip select signal for each device, paralleling all other lines. Even when there is only
one device attached to a CPU, the CPU can communicate with it using a 16 bit transmission. In this
case, the upper 4 bits are dummy bits.
SPI Filter
To prevent spikes from changing the SPI settings, SPI data words are only accepted, if their length is
at least 12 bit.
Copyright © 2005, TRINAMIC Motion Control GmbH & Co KG
TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
