TMC223 DATASHEET (V. 1.05 / March 7, 2011)
7
2.7 Pin and Signal Descriptions
1
2
20
19
18
17
16
15
14
13
12
11
SDA
SCL
VDD
GND
TST
SWI
32 31 30 29 28 27 26 25
VBAT
OA1
GND
OA2
OB1
GND
OB2
VBAT
VCP
3
OA1
OB2
4
OA1
VBAT
VBAT
OB2
VBAT
VBAT
5
TMC 223
QFN32
6
VBAT
SWI
NC
VBAT
VCP
CPP
CPN
open
GND
HW
7
SDA
8
9
10 11 12 13 14 15 16
9
CPN
CPP
10
Top view
Name
SDA
SCL
SOIC20
QFN32
Description
1
2
3
8
9
SDA Serial Data input/output
SCL Serial Clock input
internal supply (needs external decoupling capacitor)
VDD
GND
10
4,7,14,17 11,14,25,26, ground, heat sink
31,32
TST
open
HW
5
6
8
12
13
15
test pin (to be tied to ground in normal operation)
must be left open
hard-wired serial interface address bit input
Hint: The SWI is not a logic level input as usual; it needs to
be connected via 1K resistor either to +VBAT or GND;
negative connection of external charge pump capacitor
positive connection of external charge pump capacitor
connection of external charge pump filter capacitor
CPN
CPP
VCP
VBAT
OB2
OB1
OA2
OA1
SWI
9
10
17
18
19
11
12, 19
13
15
3-5,20-22 battery voltage supply
23,24
27,28
29,30
1,2
negative end of phase B coil
positive end of phase B coil
16
18
negative end of phase A coil
positive end of phase A coil
reference switch input;
20
6
Hint: The SWI is not a logic level input as usual; it needs to
be connected via 1K resistor either to +VBAT or GND;
internally not connected (shields when connected to ground)
NC
7,16
Table 1: TMC223 Signal Description
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