TMC2160 DATASHEET (Rev. 1.02 / 2018-NOV-19)
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1.2.1 SPI Interface
The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus
master to the bus slave another bit is sent simultaneously from the slave to the master.
Communication between an SPI master and the TMC2160 slave always consists of sending one 40-bit
command word and receiving one 40-bit status word.
The SPI command rate typically is a few commands per complete motor motion.
1.3 Software
From a software point of view the TMC2160 is a peripheral with a number of control and status
registers. Most of them can either be written only or read only. Some of the registers allow both read
and write access. In case read-modify-write access is desired for a write only register, a shadow
register can be realized in master software.
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