Transcend
44-Pin ID
E Flash M
odule (Horizo
ntal)
TS128M ~
4GDOM44H-
S
(p) In True IDE mode, the host shall not assert -IORD, -CS0, -CS1, nor A[02:00] until at least tACK after
negating DMACK.
ALL WAVEFORMS IN THIS DIAGRAM ARE SHOWN WITH THE ASSERTED STATE HIGH.
NEGATIVE TRUE SIGNALS APPEAR INVERTED ON THE BUS RELATIVE TO THE DIAGRAM.
Notes: The definitions for the STOP, HDMARDY, and DSTROBE signal lines are no longer in effect after DMARQ
and DMACK are negated. A[02:00], -CS0 & -CS1 are True IDE mode signal definitions.
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