TSA7887
avoided. Thus, the analog input signal should never
exceed the either VDD or GND by more than
200mV. Even though the maximum current these
diodes can conduct without causing irreversible
damage to the ADC is 20mA, any small amount of
forward diode current into the substrate because of
an overvoltage condition on an unselected channel
can cause inaccurate conversion results on the
selected channel.
Typical Application Circuit
Figure 4 shows a typical application circuit for the
TSA7887 where the ADC’s GND pin is connected to
the analog ground plane of the system. In this
application circuit, the TSA7887 has been
configured for two-channel operation so the ADC’s
VREF is internally connected to VDD; as a result,
Attributed to parasitic package pin capacitance,
capacitor C1 in Figure 5 is typically about 1 pF.
Resistor R1 is the equivalent series resistance of the
TSA7887’s input multiplexer and input sampling
switch and is approximately 100Ω. Capacitor C2 is
the ADC sampling capacitor and has a typical
capacitance of 10 pF.
In signal-acquisition (or ac) applications, the use of
an external R-C low-pass filter on either or both
analog inputs can be useful in removing out-of-band
high-frequency components from the analog input
signal. In applications where harmonic distortion and
signal-to-noise ratio performance are important, the
analog input(s) should be driven from a low-
impedance source. Large source impedances will
affect significantly the TSA7887’s ac performance.
To lower the driving-point impedance level may
impose the use of an input buffer amplifier. The
optimal choice for the external drive op amp will be
determined by application requirements as well as
the TSA7887’s dynamic performance.
Figure 4: TSA7887's Typical Application Circuit.
the analog input range on either analog input is 0V
to VDD. It is always considered good engineering
practice to bypass the ADC’s VDD with good quality
capacitors with short leads (surface-mount
components are preferred) and located a very short
distance from the ADC. The conversion result at the
DOUT pin is a 16-bit word with four leading zeros
followed by the MSB of the 12-bit conversion result.
In low-power applications, automatic-power-down-at-
the-end-of-conversion modes (PM Modes 3 or 4)
should be used to improve the ADC’s power
consumption-versus-throughput rate performance.
For additional information on the TSA7887’s four
power management operating modes, please
consult the Operating Modes section of the
datasheet.
When the analog input is not driven by an external
amplifier, the driving-point source impedance should
be low. The maximum source impedance will
depend upon the amount of total harmonic distortion
(THD) that can be tolerated in the application. THD
will increase as the source impedance increases
Analog Input Details
Figure 6: TSA7887 THD vs Analog Input Frequency
An equivalent circuit of the analog input structure of
the TSA7887 is illustrated in Figure 5 where diodes
D1 and D2 serve as ESD-clamp protection for the
analog inputs. Since there are diodes from the
analog input to both VDD and GND, it is important
any forward conduction of current in D1 or D2 is
-60
VDD = 5V
5V External Reference
-65
-70
-75
-80
RIN = 10Ω, CIN = 10nF
-85
RIN = 50Ω, CIN = 2.2nF
-90
50
0.2
10
20
30
40
INPUT FREQUENCY - kHz
Figure 5: TSA7887’s Analog Input Equivalent Circuit.
Page 10
TSA7887DS r1p0
RTFDS
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