TSA7887
ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +5.25V; VREF = 2.5V External/Internal Reference unless otherwise noted; fSCLK = 2 MHz;
TA = TMIN to TMAX, unless otherwise noted.
Parameter
A Version1
B Version1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio (SNR)2
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Second-Order Terms
71
71
dB (typ)
dB (typ)
db (typ)
fIN = 10 kHz sine wave, fSAMPLE = 125 ksps
fIN = 10 kHz sine wave, fSAMPLE = 125 ksps
fIN = 10 kHz sine wave, fSAMPLE = 125 ksps
−80
–80
−80
−80
−80
−80
−80
2.5
−80
−80
−80
2.5
dB (typ)
dB (typ)
dB (typ)
MHz (typ)
f1 = 9.983 kHz, f2 = 10.05 kHz, fSAMPLE = 125 ksps
f1 = 9.983 kHz, f2 = 10.05 kHz, fSAMPLE = 125 ksps
fIN = 25 kHz
Third-Order Terms
Channel-to-Channel Isolation
Full-Power Bandwidth
Measured at 3 dB down
DC ACCURACY(Any channel)
Resolution
12
±2
±2
±3
±4
±6
0.5
±2
±1
±6
2
12
±1
±1
±3
±4
±6
0.5
±2
±1
±6
2
Bits
Integral Nonlinearity
Differential Nonlinearity
LSB (max)
LSB (max)
LSB (max)
LSB (max)
LSB (typ)
LSB (max)
LSB (typ)
LSB (max)
LSB (typ)
LSB (max)
Guaranteed no missing codes to 11 bits (A Grade)
VDD = 5V, dual-channel mode
VDD = 3V, dual-channel mode
Single-channel mode
Offset Error
Offset Error Match
Gain Error
Dual-channel mode
Single-channel mode, external reference
Single-channel mode, internal reference
Gain Error Match
ANALOG INPUT
Input Voltage Ranges
Leakage Current
0 to VREF
0 to VREF
V
±5
10
±5
10
μA (max)
pF (typ)
Input Capacitance
REFERENCE INPUT/OUTPUT
REFIN Input Voltage Range
Input Impedance
2.5/VDD
10
2.5/VDD
10
V (min/max)
kΩ (typ)
Functional from 1.2V
Very high impedance if internal reference disabled
REFOUT Output Voltage
2.45/2.55
±50
2.45/2.55
±50
V (min/max)
ppm/°C (typ)
REFOUT Temperature Coefficient
LOGIC INPUTS
2.4
2.1
0.8
±1
2.4
2.1
0.8
±1
V (min)
V (min)
VDD = 4.75V to 5.25V
VDD = 2.7V to 3.6V
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
V (max)
μA (max)
pF (max)
VDD = 2.7 V to 5.25 V
Typically 10 nA, VIN = 0 V or VDD
3
Input Capacitance, CIN
10
10
LOGIC OUTPUTS
ISOURCE = 200 μA
VDD = 2.7V to 5.25V
ISINK = 200 μA
Output High Voltage, VOH
VDD − 0.5
VDD − 0.5
V (min)
V (max)
μA (max)
pF (max)
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance4
Output Coding
0.4
±1
10
0.4
±1
10
Straight (Natural) Binary
CONVERSION RATE
Conversion time plus acquisition time is 125 ksps,
with 2 MHz Clock
Throughput Time
16
16
SCLK cycles
SCLK cycles
SCLK cycles 7.25 μs (2 MHz Clock)
Track-and-Hold Acquisition Time
Conversion Time
1.5
1.5
14.5
14.5
TSA7887DS r1p0
Page 3
RTFDS
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