TS7001
ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +3.6V; VREF = 2.5V External/internal reference unless otherwise noted; fSCLK = 3 MHz;
TA = TMIN to TMAX, unless otherwise noted.
Parameter
Limit1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio (SNR)2
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Second-Order Terms
71
dB (typ)
dB (typ)
db (typ)
fIN = 10 kHz sine wave, fSAMPLE = 187.5ksps
fIN = 10 kHz sine wave, fSAMPLE = 187.5ksps
fIN = 10 kHz sine wave, fSAMPLE = 187.5ksps
−80
−80
−80
−80
−80
10
dB (typ)
dB (typ)
dB (typ)
MHz (typ)
f1 = 9.983 kHz, f2 = 10.05 kHz, fSAMPLE = 187.5ksps
f1 = 9.983 kHz, f2 = 10.05 kHz, fSAMPLE = 187.5ksps
fIN = 25 kHz
Third-Order Terms
Channel-to-Channel Isolation
Full-Power Bandwidth
Measured at 3 dB down
DC ACCURACY(Any channel)
Resolution
12
±1
±1
±4
±6
0.5
±2
±1
±6
2
Bits
Integral Nonlinearity
Differential Nonlinearity
LSB (max)
LSB (max)
LSB (max)
LSB (typ)
LSB (max)
LSB (typ)
LSB (max)
LSB (typ)
LSB (max)
VDD = 3V
VDD = 3V; Guaranteed no missing codes to 11 bits
VDD = 3V, dual-channel mode
Single-channel mode
Offset Error
Offset Error Match
Dual-channel mode
Gain Error
Single-channel mode, external reference
Single-channel mode, internal reference
Gain Error Match
ANALOG INPUT
0 to VREF
0 to VDD
±5
V
Single-channel operation
Dual-channel operation
Input Voltage Range
V
Leakage Current
μA (max)
pF (typ)
Input Capacitance
10
REFERENCE INPUT/OUTPUT
REFIN Input Voltage Range
Input Impedance
2.5/VDD
10
V (min/max)
kΩ (typ)
Single-channel/Dual-channel; Functional from 1.2V
Very high impedance if internal reference is disabled
Initial accuracy = 0.5%
REFOUT Output Voltage
2.488/2.513
30
V (min/max)
ppm/°C (typ)
REFOUT Temperature Coefficient
LOGIC INPUTS
Input High Voltage, VINH
2.1
0.8
±1
V (min)
V (max)
μA (max)
pF (max)
VDD = 2.7V to 3.6V
Input Low Voltage, VINL
Input Current, IIN
VDD = 2.7V to 3.6V
Typically 10nA, VIN = 0V or VDD
3
Input Capacitance, CIN
10
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
VDD − 0.5
V (min)
V (max)
μA (max)
pF (max)
VDD = 2.7V to 3.6V, ISOURCE = 200 μA
ISINK = 200 μA
0.4
±1
10
Floating-State Leakage Current
Floating-State Output Capacitance4
Straight
(Natural)
Binary
Output Coding
CONVERSION RATE
Conversion time plus acquisition time is 187.5ksps,
with 3 MHz Clock
Throughput Time
16
SCLK cycles
SCLK cycles
Track-and-Hold Acquisition Time
Conversion Time
1.5
14.5
SCLK cycles 4.833 μs (3 MHz Clock)
TS7001DS r1p0
Page 3
RTFDS
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